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  cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 1/7 HBCA143TC6 cystek product specification pnp and npn dual digital transistors HBCA143TC6 features ?built-in bias resistors enable the co nfiguration of an inverter circu it without connecting external input resistors (see equi valent circuit). ?the bias resistors consist of thin-f ilm resistors with complete isolati on to allow positive biasing of the input for pnp transistor, and nega tive biasing of the input for npn transistor. they also have the advantage of almost completely eliminating parasitic effects. ? only the on/off conditions need to be set for operation, making device design easy. ? one dta143t chip and one dtc143t chip in a sot-563 package. ? mounting by sot-523 automatic mounting machines is possible. ?mounting cost and area can be cut in half. ? transistor elements are indepe ndent, eliminating interference. ? pb-free and halogen-free package. equivalent circuit outline HBCA143TC6 r b 1=4.7k , r b 2=4.7 k sot-563 c1 b2 e2 tr1 tr2 r b 1 r b 2 e1 c2 b1 ordering information device package shipping marking HBCA143TC6 sot-563 (pb-free and halogen-free package) 3000 pcs / tape & reel 16
cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 2/7 HBCA143TC6 cystek product specification absolute maximum ratings (ta=25 ) limits parameter symbol tr1(npn) tr2(pnp) unit collector-base voltage v cbo 50 -50 v collector-emitter voltage v ceo 50 -50 v emitter-base voltage v ebo 5 -5 v collector current i c 100 -100 ma total power dissipation pd 150 (note) mw junction temperature tj 150 c storage temperature tstg -55~+150 c note : 120mw per element must not be exceeded. characteristics (ta=25 ) ?tr1(npn) parameter symbol min typ max unit test conditions collector-base breakdown voltage v cbo 50 - - v i c =50 a collector-emitter breakdown voltage v ceo 50 - - v i c =1ma emitter-base breakdown voltage v ebo 5 - - v i e =50 a collector-base cutoff current i cbo - - 0.5 a v cb =50v emitter-base cutoff current i ebo - - 0.5 a v eb =4v collector-emitter saturation voltage v ce(sat) - - 0.3 v i c =5ma, i b =0.25ma dc current gain h fe 100 - 600 - v ce =5v, i c =1ma input resistance r 3.29 4.7 6.11 k - transition frequency ft - 250 - mhz v ce =10v, i e =5ma, f=100mhz* * transition frequency of the device ?tr2(pnp) parameter symbol min. typ. max. unit test conditions collector-base breakdown voltage bv cbo -50 - - v i c =-50 a collector-emitter breakdown voltage bv ceo -50 - - v i c =-1ma emitter-base breakdown voltage bv ebo -5 - - v i e =-50 a collector-base cutoff current i cbo - - -0.5 a v cb =-50v emitter-base cutoff current i ebo - - -0.5 a v eb =-4v collector-emitter saturation voltage v ce(sat) - 0.1 -0.3 v i c =-5ma, i b =-0.25ma dc current gain h fe 100 - 600 - v ce =-5v, i c =-1ma input resistance r 3.29 4.7 6.11 k - transition frequency f t - 250 - mhz v ce =-10v, i c =-5ma,f=100mhz * * transition frequency of the device
cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 3/7 HBCA143TC6 cystek product specification typical characteristics ?tr1( npn) current gain vs collector current 10 100 1000 0.1 1 10 100 collector current --ic(ma) current gain--- hfe hfe@vce=5v saturation voltage vs collector current 10 100 1000 1 10 100 collector current --- ic(ma) saturation voltage---(mv) vcesat@ic=20ib ?tr2( pnp) current gain vs collector current 100 1000 0.1 1 10 100 collector current---ic(ma) current gain---hfe vce=5v saturation voltage vs collector current 10 100 1000 0.1 1 10 100 collector current---ic(ma) saturation voltage---(mv) vce(sat)@ic=20ib
cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 4/7 HBCA143TC6 cystek product specification typical characteristics(cont.) power derating curves 0 20 40 60 80 100 120 140 160 0 50 100 150 200 ambient temperature --- ta( ) power dissipation---pd(mw) dual single moisture sensitivity level : conform to jedec level 1 recommended storage condition: temperature : 30 c humidity : 60% rh
cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 5/7 HBCA143TC6 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 6/7 HBCA143TC6 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds temperature(tp) 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c154c6 issued date : 2010.09.29 revised date : 2012.07.19 page no. : 7/7 HBCA143TC6 cystek product specification sot-563 dimension marking: product code date code: year+month year: 6 2006, 7 2007 month: 1 1, 2 2, ??? 9 9, a 10, b 11, c 12 6-lead sot-563 plastic surface mounted package cystek package code: c6 style: pin 1. emitter1 (e1) pin 2. base1 (b1) pin 3. collector2 (c2) pin 4. emitter2 (e2) pin 5. base2 (b2) pin 6. collector1 ( c1 ) inches millimeters inches millimeters dim min. max. min. max. dim min. max. min. max. a 0.021 0.024 0.525 0.600 b 0.007 0.011 0.170 0.270 a1 0.000 0.002 0.000 0.050 e1 0.043 0.051 1.100 1.300 e 0.018 0.022 0.450 0.550 e 0.059 0.067 1.500 1.700 c 0.004 0.006 0.090 0.160 l 0.004 0.012 0.100 0.300 d 0.059 0.067 1.500 1.700 7 ref 7 ref notes : 1 .controlling dimension : millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material : ? lead : pure tin plated. ? mold compound : epoxy resin family, flammability solid burning class:ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .


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